Finite State Machines
Step 1: State Transition Diagram. Block diagram of desired system: Synchronizer Edge Detector. unsynchronized Level to user input D Q D Q L Pulse P FSM. CLK. State transition diagram is a useful FSM representation and design aid: "if L=1 at the clock edge, then jump to L=1 L=1 state 01.". L=1 Binary values of states.